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Bit-addressable Registers

List of bit-addressable registers
RegisterBitNameAddressExplanation of function
PSWFUF0x97User Flag - Available to be used freely.
PSWEUE0x96User Flag - Available to be used freely.
PSWDUD0x95User Flag - Available to be used freely.
PSWCUC0x94User Flag - Available to be used freely.
PSWBUB0x93User Flag - Available to be used freely.
PSWAUA0x92User Flag - Available to be used freely.
PSW9U90x91User Flag - Available to be used freely.
PSW8U80x90User Flag - Available to be used freely.
PSW7U70x87User Flag - Available to be used freely.
PSW6U60x86User Flag - Available to be used freely.
PSW5U50x85User Flag - Available to be used freely.
PSW4U40x84User Flag - Available to be used freely.
PSW3U30x83User Flag - Available to be used freely.
PSW2U20x82User Flag - Available to be used freely.
PSW1OV0x81Overflow Flag - This bit is set when a mathematical operation returns a value outside the signed int range (-32,768 to +32,767).
PSW0C0x80Carry Flag - This bit is set when a carry bit is left by a mathematical operation.
RegisterBitNameAddressExplanation of function
ISW3–F  Undefined
ISW2IFS0xB2Interrupt Status Flag - This bit is set when an interrupt is in progress.
ISW1IFP0xB1Interrupt Priority Flag - This bit is set when the interrupt in progress is a high-priority one, and it is cleared if it is a low-priority one.
ISW0IFH0xB0Interrupt On Hold Flag - This bit is set when the interrupt in progress interrupted another interrupt in progress.
RegisterBitNameAddressExplanation of function
TCONFTF30x8BTimer 3 Overflow - This bit is set by the microcontroller when Timer 3 overflows.
TCONETR30x8ATimer 3 Run - When this bit is set Timer 3 is turned on. When this bit is clear Timer 3 is off.
TCONDGATE30xEFGate 3 Timer - When this bit is set Timer 3 will only run when XG3 is high, otherwise it will run regardless of the state of XG3.
TCONCCT30xEECounter/Timer 3 Select - When this bit is set Timer 3 will count events on XI3, otherwise it will be incremented every computational cycle.
TCONBTF20x89Timer 2 Overflow - This bit is set by the microcontroller when Timer 2 overflows.
TCONATR20x88Timer 2 Run - When this bit is set Timer 2 is turned on. When this bit is clear Timer 2 is off.
TCON9GATE20xEDGate 2 Timer - When this bit is set Timer 2 will only run when XG2 is high, otherwise it will run regardless of the state of XG2.
TCON8CT20xECCounter/Timer 2 Select - When this bit is set Timer 2 will count events on XI2, otherwise it will be incremented every computational cycle.
TCON7TF10x8FTimer 1 Overflow - This bit is set by the microcontroller when Timer 1 overflows.
TCON6TR10x8ETimer 1 Run - When this bit is set Timer 1 is turned on. When this bit is clear Timer 1 is off.
TCON5GATE10xEBGate 1 Timer - When this bit is set Timer 1 will only run when XG1 is high, otherwise it will run regardless of the state of XG1.
TCON4CT10xEACounter/Timer 1 Select - When this bit is set Timer 1 will count events on XI1, otherwise it will be incremented every computational cycle.
TCON3TF00x8DTimer 0 Overflow - This bit is set by the microcontroller when Timer 0 overflows.
TCON2TR00x8CTimer 0 Run - When this bit is set Timer 0 is turned on. When this bit is clear Timer 0 is off.
TCON1GATE00xE9Gate 0 Timer - When this bit is set Timer 0 will only run when XG0 is high, otherwise it will run regardless of the state of XG0.
TCON0CT00xE8Counter/Timer 0 Select - When this bit is set Timer 0 will count events on XI0, otherwise it will be incremented every computational cycle.
RegisterBitNameAddressExplanation of function
XCONC–F  Undefined
XCONBXG30xCFGate 3 Active - This bit is set by the microcontroller when External Gate 3 is receiving signal.
XCONAXG20xCEGate 2 Active - This bit is set by the microcontroller when External Gate 2 is receiving signal.
XCON9XG10xCDGate 1 Active - This bit is set by the microcontroller when External Gate 1 is receiving signal.
XCON8XG00xCCGate 0 Active - This bit is set by the microcontroller when External Gate 0 is receiving signal.
XCON7XI70x9FPort 7 Received - This bit is set by the microcontroller when External Port 7 has received data.
XCON6XI60x9EPort 6 Received - This bit is set by the microcontroller when External Port 6 has received data.
XCON5XI50x9DPort 5 Received - This bit is set by the microcontroller when External Port 5 has received data.
XCON4XI40x9CPort 4 Received - This bit is set by the microcontroller when External Port 4 has received data.
XCON3XI30x9BPort 3 Received - This bit is set by the microcontroller when External Port 3 has received data.
XCON2XI20x9APort 2 Received - This bit is set by the microcontroller when External Port 2 has received data.
XCON1XI10x99Port 1 Received - This bit is set by the microcontroller when External Port 1 has received data.
XCON0XI00x98Port 0 Received - This bit is set by the microcontroller when External Port 0 has received data.
RegisterBitNameAddressExplanation of function
PCON3–F  Undefined
PCON2SLP0xA2Sleep Mode - Setting this bit enters sleep mode. In sleep mode all clocks are stopped. The processor will exit sleep mode when data is received at Port 0 or Port 1.
PCON1PD0xA1Power-Down Flag - Setting this bit enters power-down mode. In power-down mode all clocks are stopped. The processor will exit power-down mode when data is received at Port 0 or Port 1.
PCON0IDL0xA0Idle Mode - Setting this bit enters the idle mode. In idle mode the internal clock is stopped, but external timer counters continue to be clocked. The processor will exit idle mode when an enabled interrupt occurs.
RegisterBitNameAddressExplanation of function
IEFEA0xAFEnable All Interrupts - When this bit is not set (bit is 0), all interrupts are disabled regardless of the corresponding lower bit settings.
IEC–E  Undefined
IEBEP70xDCEnable Port 7 Interrupt - When this bit is set, interrupts will be caught for External Port 7 receiving data (XI7).
IEAEP60xDBEnable Port 6 Interrupt - When this bit is set, interrupts will be caught for External Port 6 receiving data (XI6).
IE9EP50xDAEnable Port 5 Interrupt - When this bit is set, interrupts will be caught for External Port 5 receiving data (XI5).
IE8EP40xD9Enable Port 4 Interrupt - When this bit is set, interrupts will be caught for External Port 4 receiving data (XI4).
IE7ET30xD8Enable Timer 3 Interrupt - When this bit is set, interrupts will be caught for Timer 3 overflowing (TF3).
IE6EP30xAEEnable Port 3 Interrupt - When this bit is set, interrupts will be caught for External Port 3 receiving data (XI3).
IE5ET20xADEnable Timer 2 Interrupt - When this bit is set, interrupts will be caught for Timer 2 overflowing (TF2).
IE4EP20xACEnable Port 2 Interrupt - When this bit is set, interrupts will be caught for External Port 2 receiving data (XI2).
IE3ET10xABEnable Timer 1 Interrupt - When this bit is set, interrupts will be caught for Timer 1 overflowing (TF1).
IE2EP10xAAEnable Port 1 Interrupt - When this bit is set, interrupts will be caught for External Port 1 receiving data (XI1).
IE1ET00xA9Enable Timer 0 Interrupt - When this bit is set, interrupts will be caught for Timer 0 overflowing (TF0).
IE0EP00xA8Enable Port 0 Interrupt - When this bit is set, interrupts will be caught for External Port 0 receiving data (XI0).
RegisterBitNameAddressExplanation of function
IPC–F  Undefined
IPBPP70xCBPort 7 Interrupt Priority - When this bit is set, External Port 7 interrupts will have high priority.
IPAPP60xCAPort 6 Interrupt Priority - When this bit is set, External Port 6 interrupts will have high priority.
IP9PP50xC9Port 5 Interrupt Priority - When this bit is set, External Port 5 interrupts will have high priority.
IP8PP40xC8Port 4 Interrupt Priority - When this bit is set, External Port 4 interrupts will have high priority.
IP7PT30xBFTimer 3 Interrupt Priority - When this bit is set, Timer 3 interrupts will have high priority.
IP6PP30xBEPort 3 Interrupt Priority - When this bit is set, External Port 3 interrupts will have high priority.
IP5PT20xBDTimer 2 Interrupt Priority - When this bit is set, Timer 2 interrupts will have high priority.
IP4PP20xBCPort 2 Interrupt Priority - When this bit is set, External Port 2 interrupts will have high priority.
IP3PT10xBBTimer 1 Interrupt Priority - When this bit is set, Timer 1 interrupts will have high priority.
IP2PP10xBAPort 1 Interrupt Priority - When this bit is set, External Port 1 interrupts will have high priority.
IP1PT00xB9Timer 0 Interrupt Priority - When this bit is set, Timer 0 interrupts will have high priority.
IP0PP00xB8Port 0 Interrupt Priority - When this bit is set, External Port 0 interrupts will have high priority.
RegisterBitNameAddressExplanation of function
User Bit Memory0x00–0x7FUser Bit Memory - User bit memory is addressed directly through the bit addresses.

Bit Memory Addresses
 0123456789ABCDEF 
 0123456789ABCDEF 
000x000x010x020x030x040x050x060x070x080x090x0A0x0B0x0C0x0D0x0E0x0F0F
100x100x110x120x130x140x150x160x170x180x190x1A0x1B0x1C0x1D0x1E0x1F1F
200x200x210x220x230x240x250x260x270x280x290x2A0x2B0x2C0x2D0x2E0x2F2F
300x300x310x320x330x340x350x360x370x380x390x3A0x3B0x3C0x3D0x3E0x3F3F
400x400x410x420x430x440x450x460x470x480x490x4A0x4B0x4C0x4D0x4E0x4F4F
500x500x510x520x530x540x550x560x570x580x590x5A0x5B0x5C0x5D0x5E0x5F5F
600x600x610x620x630x640x650x660x670x680x690x6A0x6B0x6C0x6D0x6E0x6F6F
700x700x710x720x730x740x750x760x770x780x790x7A0x7B0x7C0x7D0x7E0x7F7F
80COVU2U3U4U5U6U7TR2TF2TR3TF3TR0TF0TR1TF18F
90U8U9UAUBUCUDUEUFXI0XI1XI2XI3XI4XI5XI6XI79F
A0IDLPDSLP     EP0ET0EP1ET1EP2ET2EP3EAAF
B0IFHIFPIFS     PP0PT0PP1PT1PP2PT2PP3PT3BF
C0        PP4PP5PP6PP7XG0XG1XG2XG3CF
D0        ET3EP4EP5EP6EP7   DF
E0        CT0GATE0CT1GATE1CT2GATE2CT3GATE3EF
F0                FF
 Green Background are IP bits (Interrupt Priority)
 Blue Background are IE bits (Interrupt Enable)
 Red Background are PCON bits (Power Control)
 Yellow Background are XCON bits (External Ports Received)
 Orange Background are TCON bits (Timer Control)
 Pink Background are PSW bits (Flags)
 Purple Background are ISW bits (Flags)
 Navy Background are user bit memory addresses
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©2009 Daniel Julivert