| PC | 0x0089 | Program Counter - Not addressable - Points to the memory address of the next instruction to be executed. |
| SP | 0x0081 | Stack Pointer - Points to the current top-most internal memory position of the stack (i.e. the next value to be removed from the stack). It is initialized at 0x0028. |
| B | 0x00F0 | B Register - Used by MUL and DIV to store the higher bytes and remainder of the operations, respectively. |
| CMP | 0x0086 | Comparison Register - Used by CJNE to make comparisions for conditional branching. |
| IR | 0x00A1 | Instruction Register - Not addressable - Register where the current instruction is read for execution. |
| O1R | 0x00A2 | Operand 1 Register - Not addressable - Register where the first operand of the current instruction is read for execution. |
| O2R | 0x00A3 | Operand 2 Register - Not addressable - Register where the second operand of the current instruction is read for execution. |
| EA1R | 0x00A4 | Effective Address 1 Register - Not addressable - Register where the memory address of the first operand of the current instruction is read for execution. |
| EA2R | 0x00A5 | Effective Address 2 Register - Not addressable - Register where the memory address of the second operand of the current instruction is read for execution. |
| PSW* | 0x00D0 | Program Status Word - Bit-addressable - Contains several bits used internally by some instructions, including the carry flag and the overflow flag. This register should be preserved during interrupt handlers. |
| ISW* | 0x00C0 | Interrupt Status Word - Bit-addressable - Contains several bits used internally by the microcontroller to handle interrupts. This register should not be preserved during interrupt handlers. |
| PCON* | 0x0087 | Power Control - Bit-addressable - Controls the CPU's power control modes, to make it go into sleep. |
| TCON* | 0x0088 | Timer Control - Bit-addressable - Controls the timers' mode of operation and whether the timers are running. |
| XCON* | 0x00E0 | External Port Control - Bit-addressable - Controls the external ports' mode of operation and contains several bits that are set or cleared by the external gates. |
| IE* | 0x00A8 | Interrupt Enable - Bit-addressable - Enables and disables the specific interrupts, with one bit for each interrupt. |
| IP* | 0x00B8 | Interrupt Priority - Bit-addressable - Specifies the priority of each interrupt, with one bit for each interrupt. |
| TIM0 | 0x008A | Timer 0 - A 2 byte value that is incremented by one at each machine cyle. |
| TRE0 | 0x008C | Timer 0 Reload - Initialized to 0x0000, when timer 0 overflows it resets to the value stored at TRE0. |
| TIM1 | 0x008B | Timer 1 - A 2 byte value that is incremented by one at each machine cyle. |
| TRE1 | 0x008D | Timer 1 Reload - Initialized to 0x0000, when timer 1 overflows it resets to the value stored at TRE1. |
| TIM2 | 0x0082 | Timer 2 - A 2 byte value that is incremented by one at each machine cyle. |
| TRE2 | 0x0084 | Timer 2 Reload - Initialized to 0x0000, when timer 2 overflows it resets to the value stored at TRE2. |
| TIM3 | 0x0083 | Timer 3 - A 2 byte value that is incremented by one at each machine cyle. |
| TRE3 | 0x0085 | Timer 3 Reload - Initialized to 0x0000, when timer 3 overflows it resets to the value stored at TRE3. |
| P0 | 0x0080 | Port 0 Input Register - Data from external port 0 is read here. |
| P1 | 0x0090 | Port 1 Input Register - Data from external port 1 is read here. |
| P2 | 0x00A0 | Port 2 Input Register - Data from external port 2 is read here. |
| P3 | 0x00B0 | Port 3 Input Register - Data from external port 3 is read here. |
| P4 | 0x00C8 | Port 4 Input Register - Data from external port 4 is read here. |
| P5 | 0x00D8 | Port 5 Input Register - Data from external port 5 is read here. |
| P6 | 0x00E8 | Port 6 Input Register - Data from external port 6 is read here. |
| P7 | 0x00F8 | Port 7 Input Register - Data from external port 7 is read here. |
| ISRP0 | 0x0091 | Interrupt Service Routine Port 0 - Memory address of the interrupt handler for External Port 0 interrupts. |
| ISRT0 | 0x0092 | Interrupt Service Routine Timer 0 - Memory address of the interrupt handler for Timer 0 interrupts. |
| ISRP1 | 0x0093 | Interrupt Service Routine Port 1 - Memory address of the interrupt handler for External Port 1 interrupts. |
| ISRT1 | 0x0094 | Interrupt Service Routine Timer 1 - Memory address of the interrupt handler for Timer 1 interrupts. |
| ISRP2 | 0x0095 | Interrupt Service Routine Port 2 - Memory address of the interrupt handler for External Port 2 interrupts. |
| ISRT2 | 0x0096 | Interrupt Service Routine Timer 2 - Memory address of the interrupt handler for Timer 2 interrupts. |
| ISRP3 | 0x0099 | Interrupt Service Routine Port 3 - Memory address of the interrupt handler for External Port 3 interrupts. |
| ISRT3 | 0x009A | Interrupt Service Routine Timer 3 - Memory address of the interrupt handler for Timer 3 interrupts. |
| ISRP4 | 0x009B | Interrupt Service Routine Port 4 - Memory address of the interrupt handler for External Port 4 interrupts. |
| ISRP5 | 0x009C | Interrupt Service Routine Port 5 - Memory address of the interrupt handler for External Port 5 interrupts. |
| ISRP6 | 0x009D | Interrupt Service Routine Port 6 - Memory address of the interrupt handler for External Port 6 interrupts. |
| ISRP7 | 0x009E | Interrupt Service Routine Port 7 - Memory address of the interrupt handler for External Port 7 interrupts. |
